Coherence times (T1 and T2)
T1 and T2 are coherence times: how long a qubit keeps its information before noise wears it away. T1 is how long a qubit holds its energy (a stored 1). T2 is how long it keeps its phase, the timing that makes quantum interference work. Your whole program must finish in a small part of these times.
What is quantum coherence time?
A qubit is fragile. Heat, stray electric fields and tiny vibrations slowly scramble it. Coherence time is a measure of how long the qubit stays useful before that happens. There are two main kinds.
T1, the energy time (also called relaxation time). A qubit in state 1 holds a little extra energy. Over time it tends to drop back to 0 and lose that energy. T1 is the time scale for that drop. After one T1, only about 37% of qubits that started in 1 are still in 1. (That 37% comes from 1 ÷ e, where e ≈ 2.718.) After two T1s, about 14% are left.
T2, the phase time (also called dephasing time). A qubit can be in a superposition: a blend of 0 and 1 with a certain phase. Phase is like the timing of a wave. Interference, the tool quantum programs use to boost right answers, depends on phase. Noise nudges the phase at random until it is lost. T2 is the time scale for that loss. Physics says T2 can never be more than 2 × T1. In practice it is often shorter than T1.
An everyday example. Picture a spinning top. It slowly loses energy and falls over. That is like T1. Now picture a room of people clapping in time. At first they are in sync. Each person drifts a tiny bit, and soon the claps are a mess, even though everyone is still clapping. That is like T2. Nobody lost energy. They lost timing.
Where the example breaks. A top falls at one moment you can see. A qubit does not. T1 and T2 are averages over many runs. Each single qubit either decays or not, at random, and you only learn which by measuring. Also, T2 is not a countdown to a crash. Information fades gradually from the first moment.
Why does gate speed matter as much as coherence time?
A long T2 sounds great. But what matters is how many operations fit inside it. A machine with long coherence and slow gates can fit about as many steps as a machine with short coherence and fast gates.
So the useful number is roughly coherence time ÷ gate time. This is why you cannot rank machines by T1 or T2 alone. Trapped-ion qubits can hold their phase for around a second. Superconducting qubits hold it for microseconds. (A microsecond, µs, is one millionth of a second.) But ion gates are also far slower. See the worked example below.
How are T1 and T2 measured?
Both are measured with short, standard pulse sequences. Each sequence is repeated many times at many wait times. Then a curve is fitted to the results.
- T1: inversion recovery. Flip the qubit from 0 to 1 with one pulse. Wait. Measure. Repeat for longer and longer waits. The chance of still reading 1 drops along a curve. The time scale of that curve is T1.
- T2*: the Ramsey experiment. Put the qubit halfway between 0 and 1 with a "half-flip" pulse. Wait. Apply a second half-flip, then measure. As the wait grows, the result wobbles up and down, and the wobble fades. The fade time is called T2* ("T2 star"). It includes slow drifts, such as a control signal that is slightly off.
- T2 echo: the Hahn echo experiment. Same as Ramsey, but add one full flip pulse halfway through the wait. That flip undoes slow drifts, like runners turning around at halfway so the fast and slow ones finish together. The fade time is the echo T2. It is usually longer than T2*.
- Dynamical decoupling. Adding many flip pulses instead of one cancels even more noise. It can stretch T2 further again.
So "T2" on a spec sheet might mean T2* (Ramsey) or echo T2. They are different numbers for the same qubit. The protocols are described in the engineering review Krantz et al., 2019.
Why are T1 and T2 numbers hard to compare across machines?
T1 and T2 figures are not directly comparable when any of these differ:
- Which T2. A Ramsey T2* and an echo T2 measure different things. Echo is usually longer. A spec sheet that just says "T2" may not tell you which.
- Aggregation. Is the figure the median qubit, the mean, a range, or the single best qubit? A "hero qubit" can have several times the coherence of a typical one.
- Technology. Seconds on a trapped-ion machine and microseconds on a superconducting chip are not a fair race, because gate speeds differ too. Compare coherence ÷ gate time instead.
- Date. Coherence drifts. Qubits can change from day to day as defects in the material shift. A figure from one calibration is a snapshot.
Some records also give only a rough or qualitative value, like "~1 s" or "several minutes". We record those words exactly and do not turn them into precise numbers. When a vendor did not publish a method, the record says so.
How many gates fit inside T2? A worked example
Divide T2 by the time one two-qubit gate takes. First, make both numbers use the same unit. 1 µs = 1,000 ns (nanoseconds).
- ibm_brisbane (IBM calibration data, reported in third-party papers): median T2 = 129.77 µs. Median ECR gate time = 660 ns = 0.66 µs. So 129.77 ÷ 0.66 ≈ 197 gate-lengths.
- Rigetti Ankaa-3 (vendor-reported medians): T2 = 19 µs. iSWAP gate time = 72 ns = 0.072 µs. So 19 ÷ 0.072 ≈ 264 gate-lengths.
- IonQ Aria (vendor-reported averages): T2 ≈ 1 s = 1,000,000 µs. Two-qubit gate time = 600 µs. So 1,000,000 ÷ 600 ≈ 1,667 gate-lengths.
Notice what happened. Aria's T2 is more than 50,000 times longer than Ankaa-3's (1,000,000 ÷ 19 ≈ 52,632). But the gate-lengths that fit differ by only about six times (1,667 ÷ 264 ≈ 6.3). That is the whole point of the ratio.
Now think about decay. Say a circuit on ibm_brisbane has 20 two-qubit layers in a row. That takes 20 × 0.66 = 13.2 µs. That is 13.2 ÷ 129.77 ≈ 0.10, or about one-tenth of T2. If we model the fade as a simple exponential curve, the phase that survives is e−0.1 ≈ 0.905. So about 90% remains on each qubit, from coherence alone.
Caveats. These are rough sizes, not limits. The records use different dates, and Aria's T2 is approximate. Many gates also run side by side, and gate errors usually hurt more than coherence. Read this as "how much room is there", not "how many gates you can run".
How do you read T1 and T2 on a QPU137 hardware page?
On each QPU page, coherence figures appear under "Coherence". Read the method and aggregation lines, not just the number. These records show the most common traps:
- QuEra Aquila lists both kinds of T2, vendor-reported: a Ramsey T2* of 5.8 µs and a spin-echo T2 of 11.4 µs. Same atoms, two methods, and the echo value is about twice as long.
- OQC Toshiko lists a vendor-reported median T1 of 69 µs and a median echo T2 of 103 µs. Here T2 is longer than T1. That is allowed, because T2 can be up to 2 × T1.
- ibm_brisbane lists a median T1 of 217.83 µs and a median T2 of 129.77 µs across 127 qubits, circa June 2024, from IBM calibration data reported in a third-party paper.
Some records are rough by nature. IonQ Aria gives T1 as a range of 10-100 s and T2 as ~1 s, both vendor-reported. We keep that wording as given.
To put coherence next to gate quality, open the comparison tool. For the bigger picture, see the Inside Quantum Processors course and the metric pages for two-qubit fidelity and circuit depth.
See it in the data: the sourced catalog · compare two processors · lesson: reading hardware specs