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OQC Toshiko (Gen-1, incl. Toshiko Tokyo-1)

Name: OQC Toshiko (Gen-1, incl. Toshiko Tokyo-1) specifications
Creator: QPU137

OQC Toshiko (Gen-1, incl. Toshiko Tokyo-1) is a superconducting gate-based processor by OQC with 32 qubits (2023). Below: every publicly disclosed figure with its source, method, and vendor-claim status — plus what is not disclosed, recorded as findings.

Data as of 2026-08-19Compile a circuit for this class of device Compare

Measurement records7 disclosed · 2 not disclosed · 4 sources

Select a figure to open its record

Qubit count (qubit_count_physical)32 qubitsvendor claim

Vendor claim

Source: OQC Cloud - OQC ('32 addressable qubits')
Method: VENDOR_UNSPECIFIED
Notes: Also '32-qubit platform' in launch press release (oqc.tech newsroom, 2023-11-27).
Citation key: [oqc/oqc-toshiko:qubit-count-physical:2026-08-19]

Two-qubit gate quality (two_qubit_gate_error)median ECR error 4.6% (baseline) improved to 1.2% (with pulse-level error suppression); average 3.7x error reduction % error per gatevendor claim

Vendor claim

Source: Echo Cross Resonance gate error budgeting on a superconducting quantum processor · published 2026-01-28
Method: interleaved randomized benchmarking — 'For each pair IRB was run, interleaving the ECR gate between randomly chosen two-qubit Clifford operations for 30 different choices of random sequence'
Aggregation: median across measured pairs on a 16-qubit chain of Toshiko Tokyo-1
Notes: arXiv preprint authored by 11 Oxford Quantum Circuits-affiliated researchers (one at NQCC) — treated as vendor claim, not peer-reviewed third-party. Note: the oqc.tech/tech page's '25 billionths of a second, with only 0.2% error' figure refers to Coaxmon research in founder Peter Leek's Oxford lab, NOT to Toshiko system-level performance; third-party aggregators misattribute it.
Citation key: [oqc/oqc-toshiko:two-qubit-gate-error:2026-08-19]

Single-qubit gate quality (one_qubit_gate_fidelity)not publicly disclosed

Not publicly disclosed — checked 2026-08-19

Finding: No public disclosure found. This is a recorded, dated finding — we do not substitute an estimate or borrow a figure from a sibling device.
Sources queried: oqc.tech/tech, oqc.tech/access/oqc-cloud, Toshiko launch press release (oqc.tech newsroom), arXiv:2601.20458
Notes: Aggregator sites quote ~99.9% median 1Q fidelity but no vendor/peer-reviewed source found this session.

Coherence (T1)69 (median) microsecondsvendor claim

Vendor claim

Source: Echo Cross Resonance gate error budgeting on a superconducting quantum processor · published 2026-01-28
Method: device characterization reported in OQC-authored paper
Aggregation: median across device
Citation key: [oqc/oqc-toshiko:t1:2026-08-19]

Coherence (T2_echo)103 (median) microsecondsvendor claim

Vendor claim

Source: Echo Cross Resonance gate error budgeting on a superconducting quantum processor · published 2026-01-28
Method: echo T2 (T2e) reported in OQC-authored paper
Aggregation: median across device
Citation key: [oqc/oqc-toshiko:t2-echo:2026-08-19]

Readout (readout_fidelity)96 (median) %vendor claim

Vendor claim

Source: Echo Cross Resonance gate error budgeting on a superconducting quantum processor · published 2026-01-28
Method: VENDOR_UNSPECIFIED
Aggregation: median
Citation key: [oqc/oqc-toshiko:readout-fidelity:2026-08-19]

Gate duration (two_qubit_gate_duration)250-460 (range across qubit pairs) nanosecondsvendor claim

Vendor claim

Source: Echo Cross Resonance gate error budgeting on a superconducting quantum processor · published 2026-01-28
Method: VENDOR_UNSPECIFIED
Aggregation: range across pairs
Citation key: [oqc/oqc-toshiko:two-qubit-gate-duration:2026-08-19]

Availability (availability_and_launch)Launched 2023-11-27 ('available today in private preview'); now 'deployed and securely accessible in datacentres in the UK, Japan and soon New York, as well as in a supercomputing centre in Spain'vendor claim

Vendor claim

Source: OQC Releases 32-Qubit Quantum Chip - OQC Toshiko · published 2023-11-27
Method: VENDOR_UNSPECIFIED
Notes: Deployment-locations quote from oqc.tech/tech. Named after Toshiko Yuasa; positioned as 'enterprise ready quantum platform'; NVIDIA CUDA Quantum integration announced.
Citation key: [oqc/oqc-toshiko:availability-and-launch:2026-08-19]

Pricing model (pricing_model)not publicly disclosed

Not publicly disclosed — checked 2026-08-19

Finding: No public disclosure found. This is a recorded, dated finding — we do not substitute an estimate or borrow a figure from a sibling device.
Sources queried: oqc.tech/access/oqc-cloud (mentions 'cost-effective and flexible entry point', 'minimal upfront investment' but no pricing structure), Toshiko launch press release
Notes: QCaaS commercial access exists; the pricing structure (subscription vs pay-per-use) is not published.

Topology

other — 32-qubit Kagome lattice topology (per NVIDIA CUDA-Q hardware-backend docs: 'the 32 qubit Kagome lattice topology Toshiko device'). The OQC-authored arXiv paper shows the coupling graph of Toshiko Tokyo-1 and studies a 16-qubit nearest-neighbor chain within it.

SOURCE: CUDA-Q Hardware Backends - NVIDIA CUDA-Q documentation

Native gate set

1q —
2q ECR (Echo Cross Resonance)

SOURCE: Echo Cross Resonance gate error budgeting on a superconducting quantum processor (OQC-affiliated authors)

Cloud access

OQC Cloud (QCaaS via public internet, scheduled access windows)
NVIDIA CUDA-Q target
deployed in commercial datacentres UK/Japan/Spain (Equinix ecosystem), New York planned

Corrections

Found an error in this data? Report it — every report is logged publicly, whether or not it turns out to be right.

QPU137 is independent and is not affiliated with, endorsed by, or sponsored by OQC. Figures above are public disclosures recorded with their sources on 2026-08-19; vendor claims are labeled as such and may not be directly comparable across measurement methods — see methodology.