How QPU137 measures things

How is the simulator verified?

The QPU137 simulator is a dense statevector engine (little-endian indexing, Qiskit-compatible). Its correctness suite is a release blocker: gate-algebra identity tests, closed-form analytical states (Bell, GHZ, W, QFT, Deutsch–Jozsa, Bernstein–Vazirani, Grover at the optimal iteration), differential testing against a deliberately naive Kronecker-product oracle, property tests (reversibility, norm preservation, idle-qubit invariance), sampling statistics (chi-square with a nightly rejection-rate check — a sampler that never fails is as suspicious as one that always does), and 216 golden fixtures generated from Qiskit and cross-validated against Cirq — two independent references, because one reference cannot tell you it is wrong. Every run is seeded; identical seeds reproduce identical counts, bit for bit.

Limits are stated, not hidden: browser statevector simulation is capped at 24 qubits (2²⁴ amplitudes ≈ 268 MB) and refuses larger circuits before allocating memory.

What does the reference compiler actually do?

The cross-architecture comparison uses the QPU137 reference compiler: lowering to one- and two-qubit primitives → interaction-graph greedy layout → shortest-path routing with a small lookahead → local optimization (entangler cancellation, single-qubit fusion) → per-basis synthesis (ZYZ/ZXZ/ZSX Euler forms). Every compilation is proved semantically equivalent to its source circuit — up to the layout permutation and global phase — by direct statevector comparison in our test suite, and every explanation shown in the UI is generated from the compiler's own trace, never hand-written per device.

What it does not claim:

• It is not a vendor compiler. Production compilers (Qiskit, TKET, vendor toolchains) apply years of optimization work and will frequently produce better circuits, especially at high optimization levels.
• Native entanglers (ECR, MS, ZZ-class) are counted as their CX/CZ local equivalents. Local equivalence preserves the two-qubit operation count — the quantity we report — but the emitted gate sequence is not the vendor's pulse-level reality.
• Compiled numbers do not predict vendor results. They show the structural cost a topology and basis impose — the thing that is true regardless of whose compiler you use.
• Non-gate machines (annealers, analog neutral-atom, continuous-variable photonics) are excluded from gate-level comparison rather than forced into a false equivalence.

Where does the hardware data come from?

Every figure in the catalog was collected from a public source — vendor documentation, spec pages, peer-reviewed papers, or technical reports — and recorded with the source URL, a retrieval date, the stated measurement method and aggregation (a device-median is not a best-pair), and a vendor-claim classification. Headline claims on 26 of the 35 catalogued devices were re-verified by independently re-fetching the cited source (verification log dated 2026-08-19); the remaining records carry their original citations. Where a specification is not publicly disclosed, we record that as a dated finding with the places we looked — never an estimate, never a blank.

Comparisons carry a mandatory “why these numbers may not be directly comparable” finding, and no universal winner is ever declared. See the editorial policy and data sources.

What should I check myself?

Everything. Each figure links to its source; each comparison states its caveats; the simulator and compiler are deterministic, so any run can be reproduced from its seed. If you find an error, report it — corrections are logged publicly.