Pricing…Open Lab
Chapter 04 of 12 · ~15 min

Connectivity Constraints

A coupling map is a picture of which qubit pairs on a chip can work together directly. A two-qubit gate between qubits that are not linked cannot run as written. Routing moves qubit states until the two qubits sit side by side. Every extra step of distance costs extra two-qubit gates, so distance turns straight into error.

What is a coupling map?

Why care? On many chips, the wiring decides more of your error than the program itself. If you can read the wiring map, you can guess the cost before you run.

A coupling map is a kind of graph. It has one dot for each physical qubit. It has one line for each pair that can run a two-qubit gate directly. If two qubits share no line, no gate between them can run as written. Full stop.

An everyday example: a subway map. You can only ride between stations joined by a line. To get somewhere far, you pass through the stations in between. Here the example breaks. A train carries you. In a chip, the qubit state itself has to be passed along, one neighbour at a time, and each pass costs gates and adds error.

Some maps are directed. That means a line may allow CX with the control on one side only. (CX is the controlled-NOT gate. It flips the target qubit when the control qubit is 1.) You can flip the direction. It costs four extra Hadamard (H) gates around the CX. You put one H on each of the two qubits before the gate, and one on each after it. That is 2 qubits × 2 sides = 4. This H sandwich swaps the roles of control and target. It is the same H-sandwich trick that turned CZ into CX in the basis and native gates lesson. One-qubit gates usually make about ten times fewer errors than two-qubit gates. So this is a small cost, but it is not free.

When your circuit asks two unlinked qubits to work together, the compiler routes. It adds steps that move qubit states across the map until the two qubits share a line.

What the rest of this chapter covers
  1. Worked example: what distance costs
  2. What does the gate you meant give?INTERACTIVE
  3. What does a line-shaped chip actually run?INTERACTIVE
  4. Why is shortest path not the whole answer?
  5. What happens if you skip the routing?INTERACTIVE
  6. How do sparse grids compare with all-to-all chips?
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Connectivity Constraints · QPU137