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Chapter 07 of 12 · ~35 min

Circuit Depth Optimization

Depth is the number of time steps a circuit needs, when gates on different qubits run at the same time. Compilers lower it in two ways. They delete pairs of gates that undo each other. They also pack gates that don't share qubits into the same step. But they may only make changes that are proven to leave the answer the same.

What does depth actually measure?

Why care? Qubits only hold their state for a short time. A circuit that takes fewer steps finishes before the state fades.

A quantum circuit is an ordered list of gates. A gate is a step that acts on one or two qubits. Two gates that touch totally different qubits can run at the same time. A layer is a set of gates that run at the same time. The depth of a circuit is the number of layers it needs.

An everyday example: cooking dinner. You can boil pasta and chop salad at the same time, because they use different tools. But you can't drain the pasta until it has boiled. Depth is like the number of time slots your dinner plan needs. This example is exact for timing. It says nothing about how qubits behave. It only covers the schedule.

Worked example. Take five gates in this order:

  1. H on q0
  2. X on q1
  3. CX on (q0, q1)
  4. H on q0
  5. H on q1

Layer 1 holds H on q0 and X on q1. They use different qubits. Layer 2 holds the CX. It needs both qubits, so it waits. Layer 3 holds the two final H gates. Gate count 5, depth 3.

Now add times. Say a one-qubit gate takes 30 nanoseconds (ns) and a two-qubit gate takes 300 ns. That is typical for superconducting chips. Run one gate at a time: 30 + 30 + 300 + 30 + 30 = 420 ns. Run by layers: 30 + 300 + 30 = 360 ns. Same gates, less time.

Why do nanoseconds matter? A qubit holds its quantum state only for a limited window. That window is called the coherence time. On superconducting chips it is often tens to hundreds of microseconds (see hardware metrics). Every layer spends part of that budget. Qubits that sit idle fade too. Shallower circuits finish before the state breaks down.

What the rest of this chapter covers
  1. Why can gates cancel?
  2. What happens when two pairs cancel?INTERACTIVE
  3. When is cancellation forbidden?
  4. What happens when a CX blocks the cancellation?INTERACTIVE
  5. What if you remove the CX?INTERACTIVE
  6. Which cost should you minimize?
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Circuit Depth Optimization · QPU137