Why Qubits Fail

A qubit is a physical object — a microwave circuit, a single trapped ion, a neutral atom — whose two lowest energy states play the roles of 0 and 1. Unlike a classical bit, it can sit in a superposition: a weighted combination of both values at once, where each weight is an amplitude — a number whose square gives the probability of seeing that value when you measure. If these ideas are new, start with bits vs qubits and probability amplitudes.

A transistor bit is protected by brute force: enormous numbers of electrons pushed hard toward a decisive high or low voltage, so a little noise changes nothing. A qubit has no such margin. Its information lives in fragile continuous quantities — the amplitudes and the relative phase (the sign, or more generally the angle, between the 0-part and the 1-part) — and every stray interaction with the environment nudges them: heat, vibration, radiation, imperfect control pulses.

Engineers do not describe this damage vaguely. They quantify it with four standard figures, and all four appear on every QPU specification page on this site: T1 (energy decay time), T2 (dephasing time), gate error, and readout error. This chapter defines each one in plain terms and shows the arithmetic they imply.

T1, the energy relaxation time, answers a simple question: if I put a qubit in its higher-energy state |1⟩ and just wait, how long until it spontaneously falls back to |0⟩? The decay is exponential, like a leaking capacitor: the probability that the qubit is still in |1⟩ after waiting a time t is e^(-t/T1).

Worked example — all figures here are archetype numbers, chosen to be round and illustrative, not any vendor's spec. Suppose T1 = 200 µs and your circuit leaves a qubit idle for t = 100 µs:

1. Compute the ratio: t / T1 = 100 / 200 = 0.5.
2. Survival probability = e^(-0.5) ≈ 0.6065.
3. So the qubit holds its |1⟩ with only about 60.7% probability — roughly a 39.3% chance the stored excitation has already leaked away.

That is a worse failure rate from doing nothing for a tenth of a millisecond than most classical memory accumulates in years. Real, sourced T1 values for real devices are on our coherence T1/T2 metric page.

T2, the dephasing time, measures how long a qubit keeps its relative phase — the angle between its 0-component and its 1-component. Two states can have identical 0/1 probabilities and completely different phases: |+⟩ = (|0⟩+|1⟩)/√2 and |−⟩ = (|0⟩−|1⟩)/√2 both give 50/50 measurement results, yet they behave oppositely in any interference step. Phase is where much of quantum computing's power lives — see amplitudes and phase.

Dephasing is like two clocks drifting out of sync: each clock still ticks, but the agreement between them — the useful information — degrades. Environmental noise makes the qubit's phase wander randomly, and after a time of order T2 the phase relationship is scrambled.

Two engineering facts. First, physics guarantees T2 ≤ 2·T1: losing energy also scrambles phase, so T2 can never exceed twice T1. Second, dephasing is invisible to an immediate 0/1 measurement — the probabilities don't change, only the phase does. An error you cannot see in raw counts is the most dangerous kind, and it gets its own chapter later in this course: the phase-flip code.

Every gate is a physical control pulse — a microwave burst, a laser flash — with finite precision. Gate error is the probability that one gate leaves the qubits in a slightly wrong state; fidelity is its complement (99% fidelity means 1% error). Two-qubit gates such as CX are consistently the worst offenders, which is why our two-qubit fidelity page tracks them separately.

Worked example (archetype figures again): suppose each two-qubit gate has a 1% error and your circuit uses 100 of them. The chance that all gates succeed is 0.99^100:

1. ln(0.99) ≈ −0.01005
2. 100 × (−0.01005) = −1.005
3. e^(−1.005) ≈ 0.366

Only about a 37% chance the circuit ran cleanly. Redo it at 0.1% error: 0.999^100 = e^(100 × ln 0.999) = e^(−0.10005) ≈ 0.905 — about 90%. One extra decimal digit of fidelity is the difference between a mostly-broken and a mostly-working 100-gate circuit. Errors compound exponentially with gate count.

Finally, readout error: the measurement hardware itself sometimes reports a 0 as 1 or a 1 as 0. It applies once per qubit at the end of a run and is measured and published separately — see readout fidelity. How all of these figures get calibrated and reported is covered in fidelity, error and calibration.

Every QPU page on this site lists these four figures for real devices — each value with its source, its observation date, and a label saying how it was measured and whether it is a vendor claim or an independent benchmark. Browse the QPU index or put two devices side by side in the comparison view.

What you will notice immediately: the numbers vary enormously — across platforms by orders of magnitude (a superconducting transmon and a trapped ion live on wildly different T1 scales; see superconducting qubits and trapped-ion qubits) and even across individual qubits on the same chip. That per-qubit spread is one reason compilers care which physical qubits your circuit lands on.

To be explicit about method: the 200 µs T1 and the 1% gate error used in this chapter's arithmetic are archetype figures chosen for round numbers. Real, current, sourced values live on the T1/T2, two-qubit fidelity and readout fidelity pages — we never estimate or fill in a number a vendor has not disclosed.

You now have the failure catalog: bit flips and energy decay, phase drift, imperfect gates, lying readouts. The rest of the course builds the counterattack in order:

• Modeling errors as gates — make errors precise, placeable and traceable inside a noise-free simulator.
• The no-cloning obstacle — why the obvious fix, copying the qubit, is mathematically impossible.
• The bit-flip code and the phase-flip code — the two three-qubit codes you can run end to end, right here.
• Stabilizers, the surface code, and the physical-to-logical overhead arithmetic that dominates every serious hardware roadmap.

One promise, kept throughout: every claim is either derived in front of you, runnable in the Lab, or sourced on a hardware page.