Superconducting Qubits

A superconductor is a material that, below a critical temperature, conducts electricity with exactly zero resistance. A superconducting qubit is a small circuit made of such material — essentially a capacitor connected to a Josephson junction, which is a nanometre-thin insulating barrier between two superconductors that current can tunnel through.

The junction is the key ingredient. At this tiny, cold scale, a circuit's stored energy cannot take just any value — it is restricted to certain discrete amounts, called energy levels, like rungs on a ladder. An ordinary resonant circuit has evenly spaced energy levels, so a drive signal cannot address one level without also exciting the next. The junction makes the spacing uneven, like the energy levels of an atom. That lets the two lowest levels serve as 0 and 1, with a control pulse tuned to their gap and nothing else — an artificial atom, printed on a chip. The most common design is called a transmon, a variant engineered to be insensitive to stray electric-charge noise.

Being printed is both the strength and the weakness. Lithography can produce hundreds of qubits per chip — but unlike real atoms, no two come out identical. Each qubit's actual frequency and behaviour must be measured and its control pulses tuned to match, a continuous process called calibration. Device performance drifts between calibrations, which is why published error rates carry dates.

Superconducting processors live at the bottom of a dilution refrigerator, a nested cooling system reaching about 10–15 millikelvin — 0.010 to 0.015 kelvin, where 0 kelvin is absolute zero, the coldest temperature physics permits. Room temperature is roughly 295 kelvin, so the chip sits about twenty thousand times colder than the room.

Two reasons. First, the materials only superconduct when cold. Second, the energy gap between a qubit's 0 and 1 is tiny — about the energy of a single microwave photon, the smallest possible packet of radio-frequency energy — and if the surrounding thermal jostling carried comparable energy, heat alone would flip qubits at random. The fridge buys silence.

What the fridge does not buy is correctness. Even at base temperature, qubits suffer decoherence (stored quantum information leaking into the environment over microseconds), control pulses are imperfect, readout misidentifies states a small percentage of the time, and crosstalk — a pulse aimed at one qubit disturbing its neighbours — persists. Cold is a precondition, not a cure.

Use mid-range published figures as illustrations: single-qubit gates around 25 nanoseconds, two-qubit gates around 200 nanoseconds, and an energy-relaxation time T1 — the average time before a qubit prepared in 1 spontaneously decays to 0 — of about 100 microseconds, which is 100,000 nanoseconds.

Naively, 100,000 / 200 = 500 sequential two-qubit gates fit inside one T1. But per-gate accuracy bites much sooner. Suppose each two-qubit gate succeeds with probability 0.99. Chain the successes: after 10 gates, 0.99 to the power 10 ≈ 0.904. After 35 gates, ≈ 0.703. After 70 gates, 0.703 × 0.703 ≈ 0.49 — less than a coin flip that the whole sequence ran without a single error.

Now improve the gate to 99.9%: 0.999 to the power 70 ≈ 0.93. One decimal place of fidelity — the standard hardware term for a gate's per-use success probability, here 0.99 versus 0.999 — turned a coin flip into a 93% success rate on the same circuit. This is why practitioners watch error rates more closely than qubit counts, and why a tenfold fidelity improvement is bigger news than a tenfold qubit-count increase.

On a superconducting chip, two qubits can interact only if a physical coupler — a fabricated circuit element joining them — was printed between them. Couplers are fixed at manufacture. Typical layouts give each qubit 2 to 4 neighbours, arranged in grids or hexagon-based patterns chosen to limit crosstalk.

Any two-qubit gate between non-neighbours must be routed. Recall from lesson 1: a SWAP costs 3 CX gates. Worked numbers: on a line q0–q1–q2, a CX between q0 and q2 becomes 4 CX gates in total. At 99% per gate: 0.99 × 0.99 = 0.9801, × 0.99 = 0.9703, × 0.99 = 0.9606 — the error budget for that one logical operation quadrupled from 1% to about 4%.

On large circuits, routing overhead can rival the algorithm itself. The compiler works hard to place frequently interacting qubits near each other — and the circuit below is written the way a compiler would want it: every gate between direct neighbours.

Superconducting machines from IBM, Google, Rigetti, IQM and others are listed at /hardware/qpus. When you read a device page, look at three things together: the qubit count, the two-qubit fidelity, and the coupling map — a large chip with sparse connectivity and mediocre fidelity can be less useful than a smaller, better-connected one. /hardware/compare puts those columns side by side.