Cross-QPU Compilation Capstone
The capstone compiles one fixed logical circuit for line, grid, and all-to-all targets, then explains every difference in gate count, depth, and estimated fidelity with explicit arithmetic. The deliverable is a sourced, reproducible comparison report — not a verdict on which QPU is best.
What is the project?
Everything in this course converges here. The task: take one logical circuit of 3–5 qubits, keep it fixed, and compile it for at least three architecture targets. Then write a comparison report in which every material difference — every extra gate, every layer of depth, every point of estimated fidelity — is traced to a specific cause and backed by arithmetic anyone can recheck.
The three archetype targets:
- Line — qubits in a row, each connected only to its immediate neighbours; the harshest common connectivity.
- Grid — qubits in a rectangular lattice with up to four neighbours each; the superconducting-chip archetype.
- All-to-all — any pair may interact directly; the trapped-ion archetype.
Fixing the logical circuit is the experimental control: when only the target profile changes, every difference in the output is attributable to the target, not to the problem.
You’ve read the opening of chapter 12 — 7 more sections follow, with worked examples and circuits you can run on the page. A free account unlocks every chapter of every course (paid plans aren’t live yet — early readers get everything free).