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Willow

Name: Willow specifications
Creator: QPU137

Willow is a superconducting gate-based processor by Google with 105 qubits (2024). Below: every publicly disclosed figure with its source, method, and vendor-claim status — plus what is not disclosed, recorded as findings.

Data as of 2026-08-19Compile a circuit for this class of device Compare

Measurement records17 disclosed · 2 not disclosed · 6 sources

Select a figure to open its record

Qubit count (physical_qubit_count)105 qubitsvendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: VENDOR_UNSPECIFIED
Notes: Spec sheet 'Willow System Metrics: Number of qubits 105'. Two chip variants exist (Chip 1 optimized for QEC, Chip 2 for random circuit sampling), both 105-qubit Willow devices.
Citation key: [google/willow:physical-qubit-count:2026-08-19]

Average connectivity (average_connectivity)3.47 couplers per qubit (average)vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: VENDOR_UNSPECIFIED
Aggregation: average
Notes: 'Average connectivity 3.47 (4-way typical)'.
Citation key: [google/willow:average-connectivity:2026-08-19]

Single-qubit gate quality (one_qubit_gate_error (Chip 1, QEC))0.035% ± 0.029% %vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: randomized benchmarking, reported as 'average error' (spec sheet footnote 1)
Aggregation: mean, simultaneous operation
Notes: Corresponds to ~99.965% fidelity but vendor publishes error, not fidelity.
Citation key: [google/willow:one-qubit-gate-error-chi:2026-08-19]

Single-qubit gate quality (one_qubit_gate_error (Chip 2, RCS))0.036% ± 0.013% %vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: randomized benchmarking, reported as 'average error'
Aggregation: mean, simultaneous operation
Citation key: [google/willow:one-qubit-gate-error-chi:2026-08-19]

Two-qubit gate quality (two_qubit_gate_error (Chip 1, QEC, CZ))0.33% ± 0.18% %vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: randomized benchmarking, reported as 'average error'; gate = CZ
Aggregation: mean, simultaneous operation
Notes: Spec sheet labels this '0.33% ± 0.18% (CZ)'. Corresponds to ~99.67% mean simultaneous CZ fidelity.
Citation key: [google/willow:two-qubit-gate-error-chi:2026-08-19]

Two-qubit gate quality (two_qubit_gate_error (Chip 2, RCS, iswap-like))0.14% ± 0.052% %vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: randomized benchmarking, reported as 'average error'; gate = iswap-like
Aggregation: mean, simultaneous operation
Notes: Corresponds to ~99.86% mean simultaneous fidelity. Widely-quoted '99.88% two-qubit fidelity' in secondary press does not appear on the vendor spec sheet itself.
Citation key: [google/willow:two-qubit-gate-error-chi:2026-08-19]

Readout (readout_error (Chip 1, QEC))0.77% ± 0.21% %vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: repetitive readout, measure qubits
Aggregation: mean, simultaneous
Citation key: [google/willow:readout-error-chip-1-qec:2026-08-19]

Readout (readout_error (Chip 2, RCS))0.67% ± 0.51% %vendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: terminal measurement, all qubits
Aggregation: mean, simultaneous
Citation key: [google/willow:readout-error-chip-2-rcs:2026-08-19]

Coherence (T1 (Chip 1, QEC))68 ± 13 µsvendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: VENDOR_UNSPECIFIED
Aggregation: mean
Notes: Spec sheet footnote 2: 'Chip 1 and 2 exhibit different T1 due to a tradeoff between optimizing qubit geometry for electromagnetic shielding and maximizing coherence.'
Citation key: [google/willow:t1-chip-1-qec:2026-08-19]

Coherence (T1 (Chip 2, RCS))98 ± 32 µsvendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: VENDOR_UNSPECIFIED
Aggregation: mean
Notes: Google blog (same date) phrases this as 'T1 times... now approaching 100 µs, an impressive ~5x improvement over our previous generation of chips' (https://blog.google/technology/research/google-willow-quantum-chip/).
Citation key: [google/willow:t1-chip-2-rcs:2026-08-19]

Coherence (T2)not publicly disclosed

Not publicly disclosed — checked 2026-08-19

Finding: No public disclosure found. This is a recorded, dated finding — we do not substitute an estimate or borrow a figure from a sibling device.
Sources queried: Willow Spec Sheet PDF (both pages), Google Willow announcement blog, arXiv:2408.13687 abstract, Willow Hardware Experiment Proposal Guidance PDF (March 2026), quantumai.google/cirq/google/devices
Notes: Only T1 is published on the spec sheet and blog.

Gate duration (two_qubit_gate_duration)~42 (CZ) nsvendor claim

Vendor claim

Source: Google devices | Cirq | Google Quantum AI
Method: VENDOR_UNSPECIFIED
Aggregation: approximate
Notes: Cirq docs: CZ has 'approximate duration of 42ns on Willow processors'. The March 2026 early-access guidance PDF says generically 'gates (~35 ns)' vs measurements 600 ns.
Citation key: [google/willow:two-qubit-gate-duration:2026-08-19]

Readout (readout_duration)600 nsvendor claim

Vendor claim

Source: Hardware Experiment Proposal Guidance (Google Quantum AI) · published 2026-03
Method: VENDOR_UNSPECIFIED
Notes: 'Measurements are comparatively slow (600 ns) compared to gates (~35 ns).'
Citation key: [google/willow:readout-duration:2026-08-19]

Qec cycle rate (qec_cycle_rate)909,000 cycles/s (surface code cycle = 1.1 µs) cycles per secondvendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: surface code error-correction cycle
Notes: Chip 1. Peer-reviewed companion paper confirms 'cycle time 1.1 µs' (arXiv:2408.13687, Nature 638, 920-926, 2025).
Citation key: [google/willow:qec-cycle-rate:2026-08-19]

Error suppression factor lambda (error_suppression_factor_lambda)Λ(3,5,7) = 2.14 ± 0.02vendor claim

Vendor claim

Source: Quantum error correction below the surface code threshold (Google Quantum AI; Nature 638, 920-926, 2025) · published 2024-08-24
Method: surface code distance-3/5/7 logical error scaling
Notes: Peer-reviewed but vendor-authored (Google Quantum AI). Same figure on vendor spec sheet ('Application performance Λ3,5,7 = 2.14 ± 0.02'). Paper: distance-7 logical error rate '0.143% ± 0.003% per cycle', logical lifetime 'exceeding its best physical qubit's lifetime by a factor of 2.4 ± 0.3', real-time decoder latency 63 µs at distance-5. Paper describes 'a 101-qubit distance-7 code'.
Citation key: [google/willow:error-suppression-factor:2026-08-19]

Random circuit sampling benchmark (random_circuit_sampling_benchmark)103 qubits, depth 40, XEB fidelity = 0.1%; estimated 5 minutes on Willow vs 10^25 years on a classical supercomputervendor claim

Vendor claim

Source: Willow Spec Sheet · published 2024-12-09
Method: cross-entropy benchmarking (XEB), random circuit sampling on Chip 2; classical time is a vendor estimate
Notes: Chip 2 also spec'd at 63,000 circuit repetitions per second.
Citation key: [google/willow:random-circuit-sampling-:2026-08-19]

Cloud access (cloud_access)No public cloud access. Google Quantum Computing Service (Cirq) is restricted: 'Access is currently only granted to those on an approved list. No public access to the service is available at this time.' Research access via proposal-based early access program (Hardware Experiment Proposal Guidance, March 2026).vendor claim

Vendor claim

Source: Quantum Computing Service concepts | Cirq | Google Quantum AI
Method: VENDOR_UNSPECIFIED
Notes: Early-access constraints (March 2026 guidance): no adaptive circuits/feedforward, no error-correcting-code experiments, no |2>-state measurement; analog-mode operation experimental; ~63,000 shots/s and 60 distinct circuits/s. Noisy simulation available via public Quantum Virtual Machine.
Citation key: [google/willow:cloud-access:2026-08-19]

Pricing model (pricing_model)not publicly disclosed

Not publicly disclosed — checked 2026-08-19

Finding: No public disclosure found. This is a recorded, dated finding — we do not substitute an estimate or borrow a figure from a sibling device.
Sources queried: quantumai.google/cirq/google/concepts, Willow early access program instructions PDF (March 2026), Willow Spec Sheet, Google Willow blog
Notes: Access is invitation/proposal-based; no public pricing published.

Announcement date (announcement_date)2024-12-09vendor claim

Vendor claim

Source: Meet Willow, our state-of-the-art quantum chip (Google blog) · published 2024-12-09
Method: VENDOR_UNSPECIFIED
Notes: Spec sheet also 'Published Dec 9, 2024'.
Citation key: [google/willow:announcement-date:2026-08-19]

Topology

square-lattice — 105 qubits in a 2D square grid (diamond-shaped boundary), average connectivity 3.47 with 4-way connectivity typical in the interior. Qubit grid diagram published in spec sheet with row/column indices. Readout lines run diagonally across the chip (row+col = const).

SOURCE: Willow Spec Sheet (Google Quantum AI)

Native gate set

1q PhasedXZ (arbitrary single-qubit rotations, 25 ns on most Google devices) · virtual/physical Z (physical Z 20 ns)
2q CZ (~42 ns on Willow processors) · CPhase (supported; other 2q gates experimental per early-access guidance) · iswap-like (used on Willow Chip 2 for random circuit sampling per spec sheet)

SOURCE: Google devices | Cirq | Google Quantum AI (Willow105 gate set)

Corrections

Found an error in this data? Report it — every report is logged publicly, whether or not it turns out to be right.

QPU137 is independent and is not affiliated with, endorsed by, or sponsored by Google. Figures above are public disclosures recorded with their sources on 2026-08-19; vendor claims are labeled as such and may not be directly comparable across measurement methods — see methodology.